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DAC
2008
ACM
14 years 10 months ago
Type-matching clock tree for zero skew clock gating
Clock skew minimization is always very important in the clock tree synthesis. Due to clock gating, the clock tree may include different types of logic gates, e.g., AND gates, OR g...
Chia-Ming Chang, Shih-Hsu Huang, Yuan-Kai Ho, Jia-...
DAC
2008
ACM
14 years 10 months ago
Multithreaded simulation for synchronous dataflow graphs
Synchronous dataflow (SDF) has been successfully used in design tools for system-level simulation of wireless communication systems. Modern wireless communication standards involv...
Chia-Jui Hsu, José Luis Pino, Shuvra S. Bha...
DAC
2008
ACM
14 years 10 months ago
Analysis and implications of parasitic and screening effects on the high-frequency/RF performance of tunneling-carbon nanotube F
Intrinsic and parasitic capacitances play an important role in determining the high?frequency RF performance of devices. Recently, a new type of carbon nanotube field effect trans...
Chaitanya Kshirsagar, Mohamed N. El-Zeftawi, Kaust...
DAC
2008
ACM
14 years 10 months ago
Parameterized timing analysis with general delay models and arbitrary variation sources
Many recent techniques for timing analysis under variability, in which delay is an explicit function of underlying parameters, may be described as parameterized timing analysis. T...
Khaled R. Heloue, Farid N. Najm
DAC
2008
ACM
14 years 10 months ago
Multiprocessor performance estimation using hybrid simulation
With the growing number of programmable processing elements in today's MultiProcessor System-on-Chip (MPSoC) designs, the synergy required for the development of the hardware...
Lei Gao, Kingshuk Karuri, Stefan Kraemer, Rainer L...