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2000
IEEE
116views Hardware» more  DATE 2000»
13 years 11 months ago
An Object Oriented Design Method for Reconfigurable Computing Systems
We present a novel method for developing reconfigurable systems targeted at embedded system applications. We show how an existing object oriented design method (MOOSE) has been ad...
Martyn Edwards, Peter Green
DATE
2000
IEEE
139views Hardware» more  DATE 2000»
13 years 11 months ago
A VHDL Error Simulator for Functional Test Generation
This paper describes an efficient error simulator able to analyze functional VHDL descriptions. The proposed simulation environment can be based on commercial VHDL simulators. Al...
Alessandro Fin, Franco Fummi
DATE
2000
IEEE
65views Hardware» more  DATE 2000»
13 years 11 months ago
Test Quality and Fault Risk in Digital Filter Datapath BIST
An objective of DSP testing should be to ensure that any errors due to missed faults are infrequent compared to a circuit’s intrinsic errors, such as overflow. A method is prop...
Laurence Goodby, Alex Orailoglu
DATE
2000
IEEE
121views Hardware» more  DATE 2000»
13 years 11 months ago
Functional Test Generation for Full Scan Circuits
We study the effectiveness of functional tests for full scan circuits. Functional tests are important for design validation, and they potentially have a high defect coverage indep...
Irith Pomeranz, Sudhakar M. Reddy
DATE
2000
IEEE
75views Hardware» more  DATE 2000»
13 years 11 months ago
Layout Compaction for Yield Optimization via Critical Area Minimization
This paper presents a new compaction algorithm to improve the yield of IC layout. The yield is improved by reducing the area where the faults are more likely to happen known as cr...
Youcef Bourai, C.-J. Richard Shi