179 search results - page 6 / 36 » date 2002 |
DATE
2002
IEEE
14 years 3 months ago
2002
IEEE
Models meant for logic verification and simulation are often used for ATPG. For custom digital circuits, these models contain many tristate devices, which leads to lower fault co...
DATE
2002
IEEE
14 years 3 months ago
2002
IEEE
This paper explores the role of data analysis methods to support system-level designers in characterising the performance of embedded applications. In particular, we address the p...
DATE
2002
IEEE
14 years 3 months ago
2002
IEEE
Although algorithm level re-computing techniques can trade-off the detection capability of Concurrent Error Detection (CED) vs. time overhead, it results in 100% time overhead whe...
DATE
2002
IEEE
14 years 3 months ago
2002
IEEE
The structure of Internet applications and scenarios is changing rapidly today. This offers new potential for established technologies and methods to expand their area of applicat...
DATE
2002
IEEE
14 years 3 months ago
2002
IEEE
A gate level, automated fault diagnosis scheme is proposed for scan-based BIST designs. The proposed scheme utilizes both fault capturing scan chain information and failing test v...