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DSD
2007
IEEE
14 years 4 months ago
2007
IEEE
In this paper, the methodology for automated design of checker for communication protocol testing is presented. Based on the level of checking, different design strategies can be ...
DSD
2007
IEEE
14 years 4 months ago
2007
IEEE
Serial arithmetic uses less hardware than parallel arithmetic. Serial floating point (FP) is slower than parallel FP. The Logarithmic Number System (LNS) simplifies operations, ...
DSD
2007
IEEE
14 years 4 months ago
2007
IEEE
— This paper presents the state-of-the-art in the field of network-on-chip (NoC) benchmarking and comparison. The study identifies the mainstream approaches, how NoCs are curre...
DSD
2007
IEEE
14 years 1 months ago
2007
IEEE
We present a component-based framework and its supporting simulation tool for joint software-hardware modelling and performance analysis of multiprocessor embedded systems. This j...
DSD
2007
IEEE
13 years 10 months ago
2007
IEEE
The universal underlying assumption made today is that Systems on chip must maintain 100% correctness regardless of the application. This work advocates the concept that some appl...