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135
Voted
DSD
2009
IEEE
105views Hardware» more  DSD 2009»
15 years 10 months ago
Design of a Highly Dependable Beamforming Chip
—As CMOS process technology advances towards 32nm, SoC complexity continuously grows but its dependability significantly decreases. In this paper, a beamforming chip 1 is designe...
Xiao Zhang, Hans G. Kerkhoff
125
Voted
DSD
2009
IEEE
160views Hardware» more  DSD 2009»
15 years 7 months ago
Conservative Dynamic Energy Management for Real-Time Dataflow Applications Mapped on Multiple Processors
Voltage-frequency scaling (VFS) trades a linear processor slowdown for a potentially quadratic reduction in energy consumption. Complex dependencies may exist between different tas...
Anca Mariana Molnos, Kees Goossens
114
Voted
DSD
2009
IEEE
124views Hardware» more  DSD 2009»
15 years 10 months ago
Network-on-Chip Architecture Exploration Framework
— In this paper, we present a novel framework for the automated generation of Network-on-Chips (NoC) architectures, that enables architecture exploration and optimization. The au...
Timo Schönwald, Jochen Zimmermann, Oliver Bri...
121
Voted
DSD
2009
IEEE
148views Hardware» more  DSD 2009»
15 years 10 months ago
SIMD Architectural Enhancements to Improve the Performance of the 2D Discrete Wavelet Transform
—The 2D Discrete Wavelet Transform (DWT) is a time-consuming kernel in many multimedia applications such as JPEG2000 and MPEG-4. The 2D DWT consists of horizontal filtering alon...
Asadollah Shahbahrami, Ben H. H. Juurlink
98
Voted
DSD
2009
IEEE
95views Hardware» more  DSD 2009»
15 years 10 months ago
The Parallel Sieve Method for a Virus Scanning Engine
This paper shows a new architecture for a virus scanning system, which is different from that of an intrusion detection system. The proposed method uses two-stage matching: In the...
Hiroki Nakahara, Tsutomu Sasao, Munehiro Matsuura,...