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WCAE
2006
ACM
14 years 1 months ago
Experiences with the Blackfin architecture in an embedded systems lab
At Northeastern University we are building a number of courses upon a common embedded systems platform. The goal is to reduce the learning curve associated with new architectures ...
Michael G. Benjamin, David R. Kaeli, Richard Platc...
CSREAESA
2006
13 years 8 months ago
A Dual-core Embedded System-on-Chip Architecture for Multimedia Signal Processing Applications
- This paper presents a dual-core embedded System-on-Chip for a wide range of application fields with particularly high processing demands, including general signal processing, vid...
Hong Yue, Kui Dai, Zhiying Wang
APCCAS
2006
IEEE
229views Hardware» more  APCCAS 2006»
14 years 1 months ago
Low Power Combinational Multipliers using Data-driven Signal Gating
— A data driven approach to design and optimization of low power combinational multipliers is presented. This technique depends on signal gating to avoid un-necessary computation...
Nima Honarmand, Ali Afzali-Kusha
ISCAS
2006
IEEE
92views Hardware» more  ISCAS 2006»
14 years 1 months ago
Model of a true random number generator aimed at cryptographic applications
— The paper presents a simple stochastic model of a True Random Number Generator, which extracts randomness from the tracking jitter of a phase-locked loop. The existence of such...
Martin Simka, Milos Drutarovský, Viktor Fis...
MAM
2006
124views more  MAM 2006»
13 years 7 months ago
Design optimization and space minimization considering timing and code size via retiming and unfolding
The increasingly complicated DSP processors and applications with strict timing and code size constraints require design automation tools to consider multiple optimizations such a...
Qingfeng Zhuge, Chun Xue, Zili Shao, Meilin Liu, M...