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TPDS
2010
144views more  TPDS 2010»
13 years 8 months ago
Performance Evaluation of Dynamic Speculative Multithreading with the Cascadia Architecture
—Thread-level parallelism (TLP) has been extensively studied in order to overcome the limitations of exploiting instruction-level parallelism (ILP) on high-performance superscala...
David A. Zier, Ben Lee
ICASSP
2008
IEEE
14 years 4 months ago
Analyzing the scalability of SIMD for the next generation software defined radio
Previous studies have shown that wireless DSP algorithms exhibit high levels of data level parallelism (DLP). Commercial and research work in the field of software defined radio...
Mark Woh, Yuan Lin, Sangwon Seo, Trevor N. Mudge, ...
ICASSP
2008
IEEE
14 years 4 months ago
Address assignment sensitive variable partitioning and scheduling for DSPS with multiple memory banks
Multiple memory banks design is employed in many high performance DSP processors. This architectural feature supports higher memory bandwidth by allowing multiple data memory acce...
Chun Jason Xue, Tiantian Liu, Zili Shao, Jingtong ...
ICRA
2008
IEEE
138views Robotics» more  ICRA 2008»
14 years 4 months ago
Embedded auditory system for small mobile robots
— Auditory capabilities would allow small robots interacting with people to act according to vocal cues. In our recent work, we have demonstrated AUDIBLE, an auditory system capa...
Simon Brière, Jean-Marc Valin, Franç...
DSD
2008
IEEE
136views Hardware» more  DSD 2008»
14 years 4 months ago
Flexible Baseband Architectures for Future Wireless Systems
— The mobile communication systems today, have different radio spectrum, radio access technologies, and protocol stacks depending on the network being utilized. This gives rise t...
Najam-ul-Islam Muhammad, Rizwan Rasheed, Renaud Pa...