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ITNG
2008
IEEE
14 years 4 months ago
Parallel FFT Algorithms on Network-on-Chips
This paper presents several parallel FFT algorithms with different degree of communication overhead for multiprocessors in Network-on-Chip(NoC) environment. Three different method...
Jun Ho Bahn, Jungsook Yang, Nader Bagherzadeh
DATE
2008
IEEE
143views Hardware» more  DATE 2008»
14 years 4 months ago
Improving Synthesis of Compressor Trees on FPGAs via Integer Linear Programming
Multi-input addition is an important operation for many DSP and video processing applications. On FPGAs, multi-input addition has traditionally been implemented using trees of car...
Hadi Parandeh-Afshar, Philip Brisk, Paolo Ienne
ISCAS
2008
IEEE
112views Hardware» more  ISCAS 2008»
14 years 4 months ago
Glitch-aware output switching activity from word-level statistics
— This paper presents models for estimating the transition activity of signals at the output of adders in Field Programmable Gate Arrays (FPGAs), given only word-level measures o...
Jonathan A. Clarke, George A. Constantinides, Pete...
EIT
2008
IEEE
13 years 11 months ago
Experiments in attacking FPGA-based embedded systems using differential power analysis
Abstract--In the decade since the concept was publicly introduced, power analysis attacks on cryptographic systems have become an increasingly studied topic in the computer securit...
Song Sun, Zijun Yan, Joseph Zambreno
TC
2008
13 years 9 months ago
Throughput-Buffering Trade-Off Exploration for Cyclo-Static and Synchronous Dataflow Graphs
Multimedia applications usually have throughput constraints. An implementation must meet these constraints, while it minimizes resource usage and energy consumption. The compute in...
Sander Stuijk, Marc Geilen, Twan Basten