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ACMMSP
2004
ACM
125views Hardware» more  ACMMSP 2004»
14 years 1 months ago
Improving trace cache hit rates using the sliding window fill mechanism and fill select table
As superscalar processors become increasingly wide, it is inevitable that the large set of instructions to be fetched every cycle will span multiple noncontiguous basic blocks. Th...
Muhammad Shaaban, Edward Mulrane
ISHPC
2003
Springer
14 years 23 days ago
Code and Data Transformations for Improving Shared Cache Performance on SMT Processors
Simultaneous multithreaded processors use shared on-chip caches, which yield better cost-performance ratios. Sharing a cache between simultaneously executing threads causes excessi...
Dimitrios S. Nikolopoulos
ICDCS
2008
IEEE
14 years 2 months ago
MC2: Multiple Clients on a Multilevel Cache
In today’s networked storage environment, it is common to have a hierarchy of caches where the lower levels of the hierarchy are accessed by multiple clients. This sharing can h...
Gala Yadgar, Michael Factor, Kai Li, Assaf Schuste...
PARA
2004
Springer
14 years 28 days ago
Cache Optimizations for Iterative Numerical Codes Aware of Hardware Prefetching
Cache optimizations typically include code transformations to increase the locality of memory accesses. An orthogonal approach is to enable for latency hiding by introducing prefet...
Josef Weidendorfer, Carsten Trinitis
OSDI
1994
ACM
13 years 9 months ago
Implementation and Performance of Application-Controlled File Caching
Traditional le system implementations do not allow applications to control le caching replacement decisions. We have implemented two-level replacement, a scheme that allows appl...
Pei Cao, Edward W. Felten, Kai Li