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ICPP
1990
IEEE
13 years 11 months ago
Reducing Memory and Traffic Requirements for Scalable Directory-Based Cache Coherence Schemes
As multiprocessors are scaled beyond single bus systems, there is renewed interest in directory-based cache coherence schemes. These schemes rely on a directory to keep track of a...
Anoop Gupta, Wolf-Dietrich Weber, Todd C. Mowry
ADVIS
2000
Springer
13 years 12 months ago
Evolutionary Prefetching and Caching in an Independent Storage Units Model
Modern applications demand support for a large number of clients and require large scale storage subsystems. This paper presents a theoretical model of prefetching and caching of s...
Athena Vakali
IEEEPACT
2009
IEEE
14 years 2 months ago
Using Aggressor Thread Information to Improve Shared Cache Management for CMPs
—Shared cache allocation policies play an important role in determining CMP performance. The simplest policy, LRU, allocates cache implicitly as a consequence of its replacement ...
Wanli Liu, Donald Yeung
VALUETOOLS
2006
ACM
167views Hardware» more  VALUETOOLS 2006»
14 years 1 months ago
Detailed cache simulation for detecting bottleneck, miss reason and optimization potentialities
Cache locality optimization is an efficient way for reducing the idle time of modern processors in waiting for needed data. This kind of optimization can be achieved either on the...
Jie Tao, Wolfgang Karl
IPPS
2007
IEEE
14 years 1 months ago
A Utility-based Approach to Cost-Aware Caching in Heterogeneous Storage Systems
Modern single and multi-processor computer systems incorporate, either directly or through a LAN, a number of storage devices with diverse performance characteristics. These stora...
Liton Chakraborty, Ajit Singh