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LCTRTS
2000
Springer
13 years 11 months ago
Reordering Memory Bus Transactions for Reduced Power Consumption
Low energy consumption is becoming the primary design consideration for battery-operated and portable embedded systems, such as personal digital assistants, digital still and movi...
Bruce R. Childers, Tarun Nakra
IPPS
2010
IEEE
13 years 5 months ago
Oblivious algorithms for multicores and network of processors
We address the design of algorithms for multicores that are oblivious to machine parameters. We propose HM, a multicore model consisting of a parallel shared-memory machine with hi...
Rezaul Alam Chowdhury, Francesco Silvestri, Brando...
ISCA
2006
IEEE
150views Hardware» more  ISCA 2006»
14 years 1 months ago
Spatial Memory Streaming
Prior research indicates that there is much spatial variation in applications' memory access patterns. Modern memory systems, however, use small fixed-size cache blocks and a...
Stephen Somogyi, Thomas F. Wenisch, Anastassia Ail...
EUROMICRO
1999
IEEE
13 years 12 months ago
A Selective Compressed Memory System by On-Line Data Decompressing
This research proposes a selective compressed memory system (SCMS) focusing on a compressed cache architecture, in which only data blocks with good compression efficiency are comp...
Jang-Soo Lee, Won-Kee Hong, Shin-Dug Kim
ICCD
2004
IEEE
97views Hardware» more  ICCD 2004»
14 years 4 months ago
Runtime Execution Monitoring (REM) to Detect and Prevent Malicious Code Execution
1 Many computer security threats involve execution of unauthorized foreign code on the victim computer. Viruses, network and email worms, Trojan horses, backdoor programs used in ...
A. Murat Fiskiran, Ruby B. Lee