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ERSA
2003
139views Hardware» more  ERSA 2003»
13 years 9 months ago
Fast Design Space Exploration Method for Reconfigurable Architectures
In this paper we propose an original and fast design space exploration method targeting reconfigurable architectures. This method takes place during the first steps of a design fl...
Lilian Bossuet, Guy Gogniat, Jean Luc Philippe
ERSA
2007
88views Hardware» more  ERSA 2007»
13 years 9 months ago
Autonomous Computing Systems: A Proposed Roadmap
An autonomous computing system is a system that functions with a large degree of independence, and assumes a large amount of responsibility for its own resources and operation. As...
Neil Steiner, Peter Athanas
ERSA
2004
148views Hardware» more  ERSA 2004»
13 years 9 months ago
Efficient Floating-point Based Block LU Decomposition on FPGAs
In this paper, we propose an architecture for floatingpoint based LU decomposition for large-sized matrices. Our proposed architecture is based on the well known concept of blocki...
Gokul Govindu, Viktor K. Prasanna, Vikash Daga, Sr...
ERSA
2004
130views Hardware» more  ERSA 2004»
13 years 9 months ago
Computing Lennard-Jones Potentials and Forces with Reconfigurable Hardware
Abstract-- Technological advances have made FPGAs an attractive platform for the acceleration of complex scientific applications. These applications demand high performance and hig...
Ronald Scrofano, Viktor K. Prasanna
ERSA
2004
192views Hardware» more  ERSA 2004»
13 years 9 months ago
VTSim: A Virtex-II Device Simulator
This paper introduces VTsim, a device simulator for Xilinx Virtex-II FPGAs. VTsim is currently a globally synchronous event-driven device simulator modeled at the CLB level. Throu...
Jesse Hunter, Peter Athanas, Cameron Patterson