This paper describes the framework of internal hardware templates. These reusable templates can be instantiated, inside the FPGA, to the required precision. Thus, the resource util...
We have implemented an image combining architecture that allows distributed rendering of a partitioned data set at interactive rates. The architecture achieves real-time frame rat...
This work presents an overview of the principles that underlie the speed-up achievable by dynamic hardware reconfiguration, proposes a more precise taxonomy for the execution mode...
Retiming is an optimization technique for synchronous circuits introduced by Leiserson and Saxe in 1983. Although powerful, retiming is not very widely used because it does not ha...
Klaus Eckl, Jean Christophe Madre, Peter Zepter, C...
An evolutionary algorithm is used to evolve a digital circuit which computes a simple hash function mapping a 16bit address space into an 8-bit one. The target technology is FPGA,...
Ernesto Damiani, Andrea Tettamanzi, Valentino Libe...