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FPL
2009
Springer
105views Hardware» more  FPL 2009»
14 years 2 days ago
Improving the quality of a Physical Unclonable Function using configurable Ring Oscillators
A silicon Physical Unclonable Function (PUF), which is a die-unique challenge-response function, is an emerging hardware primitive for secure applications. It exploits manufacturi...
Abhranil Maiti, Patrick Schaumont
FPL
2009
Springer
106views Hardware» more  FPL 2009»
14 years 2 days ago
Low power techniques for Motion Estimation hardware
Motion Estimation (ME) is the most computationally intensive and the most power consuming part of video compression and video enhancement systems. In this paper, we propose a nove...
Caglar Kalaycioglu, Onur C. Ulusel, Ilker Hamzaogl...
FPL
2009
Springer
101views Hardware» more  FPL 2009»
14 years 2 days ago
An accelerator for K-TH nearest neighbor thinning based on the IMORC infrastructure
The creation and optimization of FPGA accelerators comprising several compute cores and memories are challenging tasks in high performance reconfigurable computing. In this paper...
Tobias Schumacher, Christian Plessl, Marco Platzne...
DDECS
2009
IEEE
116views Hardware» more  DDECS 2009»
13 years 8 months ago
MTPP - Modular Traffic Processing Platform
High-speed (10 Gb/s and above) network monitoring and traffic processing requires hardware acceleration. Different applications require different functions to be placed in hardware...
Jiri Halak, Sven Ubik
ANCS
2009
ACM
13 years 5 months ago
Experience with high-speed automated application-identification for network-management
AtoZ, an automatic traffic organizer, provides control of how network-resources are used by applications. It does this by combining the high-speed packet processing of the NetFPGA...
Marco Canini, Wei Li 0009, Martin Zádn&iacu...