We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...
We propose a new parallelization scheme for the hmmsearch function of the HMMER software, in order to target FPGA technology. hmmsearch is a very compute intensive software for bio...
Abstract--The paper is focused on NI Compact-RIO configured as a controller for the active magnetic levitation used here as a benchmark for time-critical systems. Three realtime co...
d hardware design from behavior-level abstraction has drawn wide interest in FPGA-based acceleration and configurable computing research field. However, for many high-level progra...
A systematic approach to the comparison of the graphics processor (GPU) and reconfigurable logic is defined in terms of three throughput drivers. The approach is applied to five ca...
Ben Cope, Peter Y. K. Cheung, Wayne Luk, Lee W. Ho...