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FPL
2006
Springer
105views Hardware» more  FPL 2006»
14 years 5 days ago
A Scalable Network ASIP Enabling Flow Awareness in Ethernet Access
In this paper we research an FPGA based Application Specific Instruction Set Processor (ASIP) tailored to the needs of a flow aware Ethernet access node. The processor has an arch...
K. Van Renterghem, Dieter Verhulst, S. Verschuere,...
FPL
2006
Springer
137views Hardware» more  FPL 2006»
14 years 5 days ago
FPGA Performance Optimization Via Chipwise Placement Considering Process Variations
Both custom IC and FPGA designs in the nanometer regime suffer from process variations. But different from custom ICs, FPGAs' programmability offers a unique design freedom t...
Lerong Cheng, Jinjun Xiong, Lei He, Mike Hutton
FPL
2006
Springer
120views Hardware» more  FPL 2006»
14 years 5 days ago
Regular Expression Software Deceleration for Intrusion Detection Systems
The use of reconfigurable hardware for network security applications has recently made great strides as FPGA devices have provided larger and faster resources. Regular expressions...
Zachary K. Baker, Viktor K. Prasanna, Hong-Jip Jun...
FPL
2006
Springer
96views Hardware» more  FPL 2006»
14 years 5 days ago
High Speed Document Clustering in Reconfigurable Hardware
High-performance document clustering systems enable similar documents to automatically self-organize into groups. In the past, the large amount of computational time needed to clu...
G. Adam Covington, Charles L. G. Comstock, Andrew ...
FPL
2006
Springer
211views Hardware» more  FPL 2006»
14 years 5 days ago
Comparing FPGAs to Graphics Accelerators and the Playstation 2 Using a Unified Source Description
Field programmable gate arrays (FPGAs), graphics processing units (GPUs) and Sony's PlayStation 2 vector units offer scope for hardware acceleration of applications. We compa...
Lee W. Howes, Paul Price, Oskar Mencer, Olav Beckm...