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49
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fpl 2009
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The evolution of architecture exploration of programmable devices
14 years 12 days ago
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fpl2009.org
Jonathan Rose
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Optimal runtime reconfiguration strategies for systolic arrays
14 years 1 months ago
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www.ccrc.wustl.edu
Arpith C. Jacob, Jeremy D. Buhler, Roger D. Chambe...
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CNP: An FPGA-based processor for Convolutional Networks
14 years 1 months ago
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Clément Farabet, Cyril Poulet, Jefferson Y....
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A biophysically accurate floating point somatic neuroprocessor
13 years 11 months ago
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rose.bris.ac.uk
Yiwei Zhang, José L. Núñez-Y&...
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Towards a unique FPGA-based identification circuit using process variations
14 years 1 months ago
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www.cse.cuhk.edu.hk
Haile Yu, Philip H. W. Leong, Heiko Hinkelmann, Le...
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