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FPL
2009
Springer
14 years 2 months ago
2009
Springer
This paper presents a reconfigurable processor designed to execute user-defined block-matching motion estimation algorithms, and a toolset for the design of such algorithms and ...
FPL
2009
Springer
14 years 2 months ago
2009
Springer
Recent computing-oriented FPGAs feature DSP blocks including small embedded multipliers. A large integer multiplier, for instance for a double-precision floating-point multiplier...
FPL
2009
Springer
14 years 2 months ago
2009
Springer
The reconfigurable mesh model for massively parallel computing has recently been rediscovered and proposed as the basis of a practical many-core architecture. With this paper, we...
FPL
2009
Springer
14 years 2 months ago
2009
Springer
Motion Estimation (ME) is the most computationally intensive and the most power consuming part of video compression and video enhancement systems. In this paper, we propose a nove...
FPL
2009
Springer
14 years 2 months ago
2009
Springer
Clock gating is a power reduction technique that has been used successfully in the custom ASIC domain. Clock and logic signal power are saved by temporarily disabling the clock si...