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FPL
2009
Springer
79views Hardware» more  FPL 2009»
14 years 1 days ago
A reconfigurable architecture for the Phylogenetic Likelihood Function
As FPGA devices become larger, more coarse-grain modules coupled with large scale reconfigurable fabric become available, thus enabling new classes of applications to run effici...
Nikolaos Alachiotis, Alexandros Stamatakis, Euripi...
FPL
2009
Springer
130views Hardware» more  FPL 2009»
14 years 1 days ago
Tracking elephant flows in internet backbone traffic with an FPGA-based cache
This paper presents an FPGA-friendly approach to tracking elephant flows in network traffic. Our approach, Single Step Segmented Least Recently Used (S3 -LRU) policy, is a netwo...
Martin Zádník, Marco Canini, Andrew ...
FPL
2009
Springer
145views Hardware» more  FPL 2009»
14 years 1 days ago
Run-time Partial Reconfiguration speed investigation and architectural design space exploration
Run-time Partial Reconfiguration (PR) speed is significant in applications especially when fast IP core switching is required. In this paper, we propose to use Direct Memory Acce...
Ming Liu, Wolfgang Kuehn, Zhonghai Lu, Axel Jantsc...
FPL
2009
Springer
96views Hardware» more  FPL 2009»
14 years 1 days ago
Noise impact of single-event upsets on an FPGA-based digital filter
Field-programmable gate arrays are well-suited to DSP and digital communications applications. SRAM-based FPGAs, however, are susceptible to radiation-induced single-event upsets ...
Brian H. Pratt, Michael J. Wirthlin, Michael P. Ca...
FPL
2009
Springer
148views Hardware» more  FPL 2009»
14 years 1 days ago
Comparing fine-grained performance on the Ambric MPPA against an FPGA
A simple image-processing application is implemented on the Ambric MPPA and an FPGA, using a similar implementation for both devices. FPGAs perform extremely well on this kind of ...
Brad L. Hutchings, Brent E. Nelson, Stephen West, ...