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39
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fpl 2010
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Enhancing FPGA Device Capabilities by the Automatic Logic Mapping to Additive Carry Chains
13 years 8 months ago
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Thomas B. Preußer, Rainer G. Spallek
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Investigation of a Masking Countermeasure against Side-Channel Attacks for RISC-based Processor Architectures
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Lyonel Barthe, Pascal Benoit, Lionel Torres
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A Flexible Compute and Memory Infrastructure for High-Level Language to Hardware Compilation
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Hagen Gädke-Lütjens, Benjamin Thielmann,...
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Decision Forest: A Scalable Architecture for Flexible Flow Matching on FPGA
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Weirong Jiang, Viktor K. Prasanna, Norio Yamagaki
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Early Prediction of Hardware Complexity in HLL-to-HDL Translation
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Alessandro Cilardo, Paolo Durante, Carmelo Lofiego...
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