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FPL
2010
Springer
106views Hardware» more  FPL 2010»
13 years 8 months ago
Increasing Design Productivity through Core Reuse, Meta-data Encapsulation, and Synthesis
This paper presents a novel IP core reuse strategy which reduces design time from days to hours for communication circuits such as digital radio receivers. This design productivity...
Adam Arnesen, Kevin Ellsworth, Derrick Gibelyou, T...
FPL
2010
Springer
105views Hardware» more  FPL 2010»
13 years 8 months ago
Reconfigurable Control Variate Monte-Carlo Designs for Pricing Exotic Options
Exotic options are financial derivatives which have complex features including path-dependency. These complex features make them difficult to price, as only computationally intensi...
Anson H. T. Tse, David B. Thomas, Kuen Hung Tsoi, ...
FPL
2010
Springer
104views Hardware» more  FPL 2010»
13 years 8 months ago
Multiplicative Square Root Algorithms for FPGAs
Abstract--Most current square root implementations for FPGAs use a digit recurrence algorithm which is well suited to their LUT structure. However, recent computing-oriented FPGAs ...
Florent de Dinechin, Mioara Joldes, Bogdan Pasca, ...
FPL
2010
Springer
148views Hardware» more  FPL 2010»
13 years 8 months ago
FEM: A Step Towards a Common Memory Layout for FPGA Based Accelerators
FPGA devices are mostly utilized for customized application designs with heavily pipelined and aggressively parallel computations. However, little focus is normally given to the FP...
Muhammad Shafiq, Miquel Pericàs, Nacho Nava...
FPL
2010
Springer
139views Hardware» more  FPL 2010»
13 years 8 months ago
Mapping Multiple Multivariate Gaussian Random Number Generators on an FPGA
A Multivariate Gaussian random number generator (MVGRNG) is an essential block for many hardware designs, including Monte Carlo simulations. These simulations are usually used in a...
Chalermpol Saiprasert, Christos-Savvas Bouganis, G...