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GLVLSI
1998
IEEE
14 years 2 months ago
1998
IEEE
A new technology mapper SELF-Map for LookUp Table LUT based Field Programmable Gate Arrays FPGAs is described. SELF-Map is based on the Stochastic Evolution SE algorithm. The stat...
GLVLSI
1998
IEEE
14 years 2 months ago
1998
IEEE
In this paper we introduce a VLSI priority encoder that uses a novel priority lookahead scheme to reduce the delay for the worse case operation of the circuit, while maintaining a...
GLVLSI
1998
IEEE
14 years 2 months ago
1998
IEEE
Important layout properties of electronic designs include interconnection length values, clock speed, area requirements, and power dissipation. A reliable estimation of those prop...
GLVLSI
1998
IEEE
14 years 2 months ago
1998
IEEE
In this paper we address the problem of optimizing mixed CMOS BiCMOS circuits. The problem is formulated as a constrained combinatorial optimization problem and solved using an ta...
GLVLSI
1998
IEEE
14 years 2 months ago
1998
IEEE
With the increased clock frequency of modern, high-performance processors over 500 MHz, in some cases, limiting the power dissipation has become the most stringent design target. ...