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HPCA
2001
IEEE
14 years 7 months ago
Reducing DRAM Latencies with an Integrated Memory Hierarchy Design
In this papel; we address the severe performance gap caused by high processor clock rates and slow DRAM accesses. We show that even with an aggressive, next-generation memory syst...
Wei-Fen Lin, Steven K. Reinhardt, Doug Burger
HPCA
2001
IEEE
14 years 7 months ago
JETTY: Filtering Snoops for Reduced Energy Consumption in SMP Servers
We propose methods for reducing the energy consumed by snoop requests in snoopy bus-based symmetric multiprocessor (SMP) systems. Observing that a large fraction of snoops do not ...
Andreas Moshovos, Gokhan Memik, Babak Falsafi, Alo...
HPCA
2001
IEEE
14 years 7 months ago
Speculative Data-Driven Multithreading
Mispredicted branches and loads that miss in the cache cause the majority of retirement stalls experienced by sequential processors; we call these critical instructions. Despite t...
Amir Roth, Gurindar S. Sohi
HPCA
2001
IEEE
14 years 7 months ago
Self-Tuned Congestion Control for Multiprocessor Networks
Network performance in tightly-coupled multiprocessors typically degrades rapidly beyond network saturation. Consequently, designers must keep a network below its saturation point...
Mithuna Thottethodi, Alvin R. Lebeck, Shubhendu S....
HPCA
2001
IEEE
14 years 7 months ago
CARS: A New Code Generation Framework for Clustered ILP Processors
Clustered ILP processors are characterized by a large number of non-centralized on-chip resources grouped into clusters. Traditional code generation schemes for these processors c...
Krishnan Kailas, Kemal Ebcioglu, Ashok K. Agrawala