Sciweavers

69 search results - page 12 / 14
» iccad 1999
Sort
View
ICCAD
1999
IEEE
97views Hardware» more  ICCAD 1999»
14 years 1 months ago
A methodology for correct-by-construction latency insensitive design
In Deep Sub-Micron (DSM) designs, performance will depend critically on the latency of long wires. We propose a new synthesis methodology for synchronous systems that makes the de...
Luca P. Carloni, Kenneth L. McMillan, Alexander Sa...
ICCAD
1999
IEEE
113views Hardware» more  ICCAD 1999»
14 years 1 months ago
Attractor-repeller approach for global placement
Traditionally, analytic placement used linear or quadratic wirelength objective functions. Minimizing either formulation attracts cells sharing common signals (nets) together. The...
Hussein Etawil, Shawki Areibi, Anthony Vannelli
ICCAD
1999
IEEE
84views Hardware» more  ICCAD 1999»
14 years 1 months ago
OPTIMISTA: state minimization of asynchronous FSMs for optimum output logic
The optimal state minimization problem is to select a reduced state machine having the best logic implementation over all possible state reductions and encodings. A recent algorit...
Robert M. Fuhrer, Steven M. Nowick
ICCAD
1999
IEEE
108views Hardware» more  ICCAD 1999»
14 years 1 months ago
Copy detection for intellectual property protection of VLSI designs
We give the first study of copy detection techniques for VLSI CAD applications; these techniques are complementary to previous watermarking-based IP protection methods in finding ...
Andrew B. Kahng, Darko Kirovski, Stefanus Mantik, ...
ICCAD
1999
IEEE
89views Hardware» more  ICCAD 1999»
14 years 1 months ago
A bipartition-codec architecture to reduce power in pipelined circuits
This paper proposes a new bipatition-codec architecture that may reduce power consumption of pipelined circuits. We treat each output value of a pipelined circuit as one state of ...
Shanq-Jang Ruan, Rung-Ji Shang, Feipei Lai, Shyh-J...