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ICCAD
2006
IEEE
128views Hardware» more  ICCAD 2006»
14 years 6 months ago
Improvements to combinational equivalence checking
The paper explores several ways to improve the speed and capacity of combinational equivalence checking based on Boolean satisfiability (SAT). State-of-the-art methods use simulat...
Alan Mishchenko, Satrajit Chatterjee, Robert K. Br...
ICCAD
2006
IEEE
125views Hardware» more  ICCAD 2006»
14 years 6 months ago
Performances improvement of FPGA using novel multilevel hierarchical interconnection structure
This paper presents a new Multilevel hierarchical FPGA (MFPGA) architecture that unifies two unidirectional programmable networks: A predictible downward network based on the But...
Hayder Mrabet, Zied Marrakchi, Pierre Souillot, Ha...
ICCAD
2006
IEEE
113views Hardware» more  ICCAD 2006»
14 years 6 months ago
A novel framework for faster-than-at-speed delay test considering IR-drop effects
Faster-than-at-speed test have been proposed to detect small delay defects. While these techniques increase the test frequency to reduce the positive slack of the path, they exace...
Nisar Ahmed, Mohammad Tehranipoor, Vinay Jayaram
ICCAD
2006
IEEE
133views Hardware» more  ICCAD 2006»
14 years 6 months ago
Stable and compact inductance modeling of 3-D interconnect structures
Recent successful techniques for the efficient simulation of largescale interconnect models rely on the sparsification of the inverse of the inductance matrix L. While there are...
Hong Li, Venkataramanan Balakrishnan, Cheng-Kok Ko...
ICCAD
2006
IEEE
110views Hardware» more  ICCAD 2006»
14 years 6 months ago
Voltage island aware floorplanning for power and timing optimization
Power consumption is a crucial concern in nanometer chip design. Researchers have shown that multiple supply voltage (MSV) is an effective method for power consumption reduction....
Wan-Ping Lee, Hung-Yi Liu, Yao-Wen Chang