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ICCAD
2007
IEEE
131views Hardware» more  ICCAD 2007»
14 years 7 months ago
Low-overhead design technique for calibration of maximum frequency at multiple operating points
— Determination of maximum operating frequencies (Fmax) during manufacturing test at different operating voltages is required to: (a) to ensure that, for a Dynamic Voltage and Fr...
Somnath Paul, Sivasubramaniam Krishnamurthy, Hamid...
ICCAD
2007
IEEE
103views Hardware» more  ICCAD 2007»
14 years 7 months ago
Enhancing design robustness with reliability-aware resynthesis and logic simulation
While circuit density and power efficiency increase with each major advance in IC technology, reliability with respect to soft errors tends to decrease. Current solutions to this...
Smita Krishnaswamy, Stephen Plaza, Igor L. Markov,...
ICCAD
2007
IEEE
173views Hardware» more  ICCAD 2007»
14 years 7 months ago
Bounding L2 gain system error generated by approximations of the nonlinear vector field
Abstract— Typical nonlinear model order reduction approaches need to address two issues: reducing the order of the model, and approximating the vector field. In this paper we fo...
Kin Cheong Sou, Alexandre Megretski, Luca Daniel
ICCAD
2007
IEEE
130views Hardware» more  ICCAD 2007»
14 years 7 months ago
Analysis and optimization of power-gated ICs with multiple power gating configurations
- Power gating is an efficient technique for reducing leakage power in electronic devices by disconnecting blocks idle for long periods of time from the power supply. Disconnecting...
Aida Todri, Malgorzata Marek-Sadowska, Shih-Chieh ...
ICCAD
2007
IEEE
137views Hardware» more  ICCAD 2007»
14 years 7 months ago
Analysis of large clock meshes via harmonic-weighted model order reduction and port sliding
— Clock meshes posses inherent low clock skews and excellent immunity to PVT variations, and have increasingly found their way to high-performance IC designs. However, analysis o...
Xiaoji Ye, Peng Li, Min Zhao, Rajendran Panda, Jia...