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DATE
2007
IEEE
14 years 3 months ago
2007
IEEE
— It has been the conventional assumption that, due to the superlinear dependence of leakage power consumption on temperature, and widely varying on-chip temperature profiles, a...
DATE
2007
IEEE
14 years 3 months ago
2007
IEEE
3D integration of multiple active layers into a single chip is a viable technique that greatly reduces the length of global wires by providing vertical connections between layers....
ETS
2007
IEEE
14 years 3 months ago
2007
IEEE
An efficient on-chip infrastructure for memory test and repair is crucial to enhance yield and availability of SoCs. Therefore embedded memories are commonly equipped with spare r...
HASE
2007
IEEE
14 years 3 months ago
2007
IEEE
Fault Tree Analysis (FTA) is a safety-analysis technique that has been recently extended to accommodate product-line engineering for critical domains. This paper describes a tool-...
HICSS
2007
IEEE
14 years 3 months ago
2007
IEEE
The success of supply chains depends on the match between the requirements and offerings that deliver the services. It can be ensured by separating requirements from the means of ...