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search results - page 112 / 2876
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An adjacency-based test pattern generator for low power BIST design
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Patrick Girard, Loïs Guiller, Christian Landr...
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ATS
2000
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Functional Testing of Microprocessors with Graded Fault Coverage
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Rajesh Kannah, C. P. Ravikumar
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ATS
2000
IEEE
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Fast hierarchical test path construction for DFT-free controller-datapath circuits
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Yiorgos Makris, Jamison Collins, Alex Orailoglu
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BMAS
2000
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Modeling and Simulation
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Characterization, Simulation and Modeling of PLL under Irradiation Using HDL-A
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I. Martínez, P. Delatte, D. Flandre
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CA
2000
IEEE
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Computer Animation
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Computer Animation: Algorithms and Techniques - A Historical Review
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Richard E. Parent
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