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ISCAS
2006
IEEE
80views Hardware» more  ISCAS 2006»
14 years 1 months ago
Fundamental limitations of continuous-time delta-sigma modulators due to clock jitter
We examine noise due to clock jitter in single-loop low pass continuous-time delta-sigma modulators employing NRZ feedback DACs. Using the discrete-time version of the Bode sensit...
K. Reddy, S. Pavan
ISCAS
2006
IEEE
114views Hardware» more  ISCAS 2006»
14 years 1 months ago
Characterization of a metastability measurement system
—We characterize the metastability measurement system [8] in which asynchronous data input and sampling clock frequencies trigger metastability. We develop the equation describin...
Antonio Cantoni, Jacqueline Walker
ISCAS
2006
IEEE
90views Hardware» more  ISCAS 2006»
14 years 1 months ago
On flash A/D-converters with low-precision comparators
— Flash analog-to-digital converters can be built using small (and fast) low-precision comparators with unpredictable thresholds followed by a digital look-up table to correct th...
Matthias Frey, Hans-Andrea Loeliger
ISCAS
2006
IEEE
113views Hardware» more  ISCAS 2006»
14 years 1 months ago
Low power state-parallel relaxed adaptive Viterbi decoder design and implementation
Abstract— In this paper, we present an algorithm/architecturelevel design solution for implementing state-parallel adaptive Viterbi decoders that, compared with their Viterbi cou...
Fei Sun, Tong Zhang
ISCAS
2006
IEEE
79views Hardware» more  ISCAS 2006»
14 years 1 months ago
Spike timing dependent adaptation for mismatch compensation
— This paper presents some circuitry for use within a visual-processing depth-recovery algorithm based upon spike timing. The accuracy of the depth calculation relies on a predic...
Katherine L. Cameron, Alan F. Murray, S. Collins