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ISCAS
2006
IEEE
116views Hardware» more  ISCAS 2006»
14 years 2 months ago
Neural network stream processing core (NnSP) for embedded systems
Abstract— NnSP is a stream-based programmable and codelevel statically reconfigurable processor for realization of neural networks in embedded systems. NnSP is provided with a n...
Hadi Esmaeilzadeh, Pooya Saeedi, Babak Nadjar Araa...
ISCAS
2006
IEEE
86views Hardware» more  ISCAS 2006»
14 years 2 months ago
Fast timing analysis of plane circuits via two-layer CNN-based modeling
Abstract— A fast timing analysis of plane circuits via two-layer CNNbased modeling, which is necessary for the solution of power/signal integrity problems in printed circuit boar...
Yuichi Tanji, Hideki Asai, Masayoshi Oda, Yoshifum...
ISCAS
2006
IEEE
142views Hardware» more  ISCAS 2006»
14 years 2 months ago
An efficient texture cache for programmable vertex shaders
Vertex texturing is state-of-the-art functionality of vertex. Thus, traditional texture caches used in RE are not the 3D geometry processor. However, it aggravates the always appli...
Seunghyun Cho, Chang-Hyo Yu, Lee-Sup Kim
ISCAS
2006
IEEE
96views Hardware» more  ISCAS 2006»
14 years 2 months ago
Approximately linear-phase recursive digital filters with variable magnitude characteristics
Abstract— This paper considers designing in the minimax sense complementary low-pass/high-pass approximately linear-phase recursive filters with variable magnitude characteristi...
Juha Yli-Kaakinen, Tapio Saramäki
ISCAS
2006
IEEE
112views Hardware» more  ISCAS 2006»
14 years 2 months ago
Towards an optimised VLSI design algorithm for the constant matrix multiplication problem
The efficient design of multiplierless implementa- The goal is to find the optimal sub-expressions across all N dot tions of constant matrix multipliers is challenged by the huge p...
Andrew Kinane, Valentin Muresan, Noel E. O'Connor