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ISCA
2008
IEEE
134views Hardware» more  ISCA 2008»
14 years 4 months ago
Flexible Decoupled Transactional Memory Support
A high-concurrency transactional memory (TM) implementation needs to track concurrent accesses, buffer speculative updates, and manage conflicts. We present a system, FlexTM (FLE...
Arrvindh Shriraman, Sandhya Dwarkadas, Michael L. ...
ISCA
2008
IEEE
119views Hardware» more  ISCA 2008»
13 years 9 months ago
Technology-Driven, Highly-Scalable Dragonfly Topology
Evolving technology and increasing pin-bandwidth motivate the use of high-radix routers to reduce the diameter, latency, and cost of interconnection networks. High-radix networks,...
John Kim, William J. Dally, Steve Scott, Dennis Ab...
ISCAS
2008
IEEE
217views Hardware» more  ISCAS 2008»
14 years 4 months ago
Approximate L0 constrained non-negative matrix and tensor factorization
— Non-negative matrix factorization (NMF), i.e. V ≈ WH where both V, W and H are non-negative has become a widely used blind source separation technique due to its part based r...
Morten Mørup, Kristoffer Hougaard Madsen, L...
ISCA
2008
IEEE
130views Hardware» more  ISCA 2008»
14 years 4 months ago
Corona: System Implications of Emerging Nanophotonic Technology
We expect that many-core microprocessors will push performance per chip from the 10 gigaflop to the 10 teraflop range in the coming decade. To support this increased performance...
Dana Vantrease, Robert Schreiber, Matteo Monchiero...
ISCA
2008
IEEE
132views Hardware» more  ISCA 2008»
14 years 4 months ago
Online Estimation of Architectural Vulnerability Factor for Soft Errors
As CMOS technology scales and more transistors are packed on to the same chip, soft error reliability has become an increasingly important design issue for processors. Prior resea...
Xiaodong Li, Sarita V. Adve, Pradip Bose, Jude A. ...