This work presents a cost-effective test structure that is applicable to built-in self-test of time-to-digital converters (TDCs). The proposed structure uses deterministic dynamic ...
Wenbo Liu, Hanqing Xing, Le Jin, Randall L. Geiger...
A majority of the papers published in leading computer architecture conferences use SPEC CPU2000, or its predecessor SPEC CPU95, which has become the de facto standard for measuri...
Abstract— The analysis of effects induced by interconnects become increasingly important as the scale of process technologies steadily shrinks. While most analyses focus on the t...
-- Timing optimization is an important goal of global routing in deep submicron era. To guarantee the timing performance of the circuit, merely adopting topology optimization becom...
— Multiple description coding (MDC) has been shown to be robust for video transmission over error-prone channels. By applying the extra prediction loops to the multiple descripti...