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ISCA
2005
IEEE
147views Hardware» more  ISCA 2005»
14 years 1 months ago
Interconnections in Multi-Core Architectures: Understanding Mechanisms, Overheads and Scaling
This paper examines the area, power, performance, and design issues for the on-chip interconnects on a chip multiprocessor, attempting to present a comprehensive view of a class o...
Rakesh Kumar, Victor V. Zyuban, Dean M. Tullsen
ISCAS
2005
IEEE
152views Hardware» more  ISCAS 2005»
14 years 1 months ago
Dictionary-based program compression on transport triggered architectures
— Program code size has become a critical design constraint of embedded systems. Large program codes require large memories, which increase the size and cost of the chip. Poor co...
Jari Heikkinen, Andrea G. M. Cilio, Jarmo Takala, ...
ISCAS
2005
IEEE
129views Hardware» more  ISCAS 2005»
14 years 1 months ago
Partitioning graphs of supply and demand
: Assume that each vertex of a graph G is either a supply vertex or a demand vertex and is assigned a positive integer, called a supply or a demand. Each demand vertex can receive ...
Takehiro Ito, Xiao Zhou, Takao Nishizeki
ISCAS
2005
IEEE
122views Hardware» more  ISCAS 2005»
14 years 1 months ago
A mixed analog-digital hybrid for speech enhancement purposes
Abstract— This paper presents and evaluates a hybrid implementation of a low complexity algorithm for speech enhancement, the Adaptive Gain Equalizer (AGE). The AGE is a subband ...
Benny Sallberg, Mattias Dahl, Henrik Akesson, Ingv...
ISCAS
2005
IEEE
155views Hardware» more  ISCAS 2005»
14 years 1 months ago
A low complexity motion compensated frame interpolation method
Abstract—In low bit-rate video communication, temporal subsampling is usually used due to limited available bandwidth. Motion compensated frame interpolation (MCFI) techniques ar...
Jiefu Zhai, Keman Yu, Jiang Li, Shipeng Li