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129
Voted
ISPD
2005
ACM
174views Hardware» more  ISPD 2005»
15 years 8 months ago
Fast and accurate rectilinear steiner minimal tree algorithm for VLSI design
In this paper, we present a very fast and accurate rectilinear Steiner minimal tree (RSMT)1 algorithm called FLUTE. The algorithm is an extension of the wirelength estimation appr...
Chris C. N. Chu, Yiu-Chung Wong
134
Voted
ISPD
2005
ACM
126views Hardware» more  ISPD 2005»
15 years 8 months ago
Effects of on-chip inductance on power distribution grid
With increase of clock frequency, on-chip wire inductance starts to play an important role in power/ground distribution analysis, although it has not been considered so far. We pe...
Atsushi Muramatsu, Masanori Hashimoto, Hidetoshi O...
111
Voted
ISPD
2005
ACM
116views Hardware» more  ISPD 2005»
15 years 8 months ago
A fast algorithm for power grid design
This paper presents an efficient heuristic algorithm to design a power distribution network of a chip by employing a successive partitioning and grid refinement scheme. In an it...
Jaskirat Singh, Sachin S. Sapatnekar
157
Voted
ISPD
2005
ACM
153views Hardware» more  ISPD 2005»
15 years 8 months ago
Evaluation of placer suboptimality via zero-change netlist transformations
In this paper we introduce the concept of zero-change transformations to quantify the suboptimality of existing placers. Given a netlist and its placement from a placer, we formal...
Andrew B. Kahng, Sherief Reda
147
Voted
ISPD
2005
ACM
249views Hardware» more  ISPD 2005»
15 years 8 months ago
APlace: a general analytic placement framework
We streamline and extend APlace, the general analytic placement engine based on ideas of Naylor et al. [7] and described in [3, 4, 5]. Previous work explored the adaptability of A...
Andrew B. Kahng, Sherief Reda, Qinke Wang