Abstract. This chapter presents principles and techniques for model-based blackbox conformance testing of real-time systems using the UPPAAL model-checking tool-suite. The basis fo...
Anders Hessel, Kim Guldstrand Larsen, Marius Mikuc...
Whereas formal verification of timed systems has become a very active field of research, the idealised mathematical semantics of timed automata cannot be faithfully implemented. Se...
Patricia Bouyer, Nicolas Markey, Pierre-Alain Reyn...
To improve FPGA performance for arithmetic circuits, this paper proposes a new architecture for FPGA logic cells that includes a 6:2 compressor. The new cell features additional f...
In the context of FPGAs, system downgrade consists in preventing the update of the hardware configuration or in replaying an old bitstream. The objective can be to preclude a syst...
Given a point set P in the plane, the Delaunay graph with respect to axis-parallel rectangles is a graph defined on the vertex set P, whose two points p, q P are connected by an ...