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FORTEST
2008
15 years 6 months ago
Testing Real-Time Systems Using UPPAAL
Abstract. This chapter presents principles and techniques for model-based blackbox conformance testing of real-time systems using the UPPAAL model-checking tool-suite. The basis fo...
Anders Hessel, Kim Guldstrand Larsen, Marius Mikuc...
FOSSACS
2008
Springer
15 years 6 months ago
Robust Analysis of Timed Automata via Channel Machines
Whereas formal verification of timed systems has become a very active field of research, the idealised mathematical semantics of timed automata cannot be faithfully implemented. Se...
Patricia Bouyer, Nicolas Markey, Pierre-Alain Reyn...
FPGA
2008
ACM
155views FPGA» more  FPGA 2008»
15 years 6 months ago
A novel FPGA logic block for improved arithmetic performance
To improve FPGA performance for arithmetic circuits, this paper proposes a new architecture for FPGA logic cells that includes a 6:2 compressor. The new cell features additional f...
Hadi Parandeh-Afshar, Philip Brisk, Paolo Ienne
118
Voted
FPL
2008
Springer
112views Hardware» more  FPL 2008»
15 years 6 months ago
Secure FPGA configuration architecture preventing system downgrade
In the context of FPGAs, system downgrade consists in preventing the update of the hardware configuration or in replaying an old bitstream. The objective can be to preclude a syst...
Benoît Badrignans, Reouven Elbaz, Lionel Tor...
140
Voted
SODA
2008
ACM
123views Algorithms» more  SODA 2008»
15 years 6 months ago
Delaunay graphs of point sets in the plane with respect to axis-parallel rectangles
Given a point set P in the plane, the Delaunay graph with respect to axis-parallel rectangles is a graph defined on the vertex set P, whose two points p, q P are connected by an ...
Xiaomin Chen, János Pach, Mario Szegedy, G&...
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