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TCAD
2008
103views more  TCAD 2008»
13 years 9 months ago
Using Transfer-Resource Graph for Software-Based Verification of System-on-Chip
The verification of a system-on-chip is challenging due to its high level of integration. Multiple components in a system can behave concurrently and compete for resources. Hence, ...
Xiaoxi Xu, Cheng-Chew Lim
TCAD
2008
73views more  TCAD 2008»
13 years 9 months ago
Reduction of Parametric Failures in Sub-100-nm SRAM Array Using Body Bias
Abstract--In this paper, we present a postsilicon-tuning technique to improve parametric yield of SRAM array using body bias (BB). First, we show that, although parametric failures...
Saibal Mukhopadhyay, Hamid Mahmoodi, Kaushik Roy
TCAD
2008
107views more  TCAD 2008»
13 years 9 months ago
Power Grid Analysis and Optimization Using Algebraic Multigrid
Abstract--This paper presents a class of power grid analysis and optimization techniques, all of which are based on the algebraic-multigrid (AMG) method. First, a new AMG-based red...
Cheng Zhuo, Jiang Hu, Min Zhao, Kangsheng Chen
TCAD
2008
75views more  TCAD 2008»
13 years 9 months ago
Static Analysis of Transaction-Level Communication Models
We propose a methodology for the early estimation of communication implementation choices eftarting from an abstract transaction level system model (TLM). The reference version of ...
Giovanni Agosta, Francesco Bruschi, Donatella Sciu...
TCAD
2008
112views more  TCAD 2008»
13 years 9 months ago
Exploiting Symmetries to Speed Up SAT-Based Boolean Matching for Logic Synthesis of FPGAs
Boolean matching is one of the enabling techniques for technology mapping and logic resynthesis of Field Programmable Gate Array (FPGA). SAT-based Boolean matching (SAT-BM) has bee...
Yu Hu, Victor Shih, Rupak Majumdar, Lei He