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TVLSI
1998
81views more  TVLSI 1998»
15 years 2 months ago
Maximum power estimation for CMOS circuits using deterministic and statistical approaches
— Excessive instantaneous power consumption may reduce the reliability and performance of VLSI chips. Hence, to synthesize circuits with high reliability, it is imperative to ef...
Chuan-Yu Wang, Kaushik Roy
TVLSI
1998
99views more  TVLSI 1998»
15 years 2 months ago
Some experiments about wave pipelining on FPGA's
— Wave pipelining offers a unique combination of high speed, low latency, and moderate power consumption. The construction of wave pipelines is benefited by the use of gates and...
Eduardo I. Boemo, Sergio López-Buedo, Juan ...
FSTTCS
2010
Springer
15 years 17 days ago
The Complexity of Model Checking (Collapsible) Higher-Order Pushdown Systems
We study (collapsible) higher-order pushdown systems -- theoretically robust and well-studied models of higher-order programs -- along with their natural subclass called (collapsi...
Matthew Hague, Anthony Widjaja To
DATE
2011
IEEE
223views Hardware» more  DATE 2011»
14 years 7 months ago
Towards a Time-predictable Dual-Issue Microprocessor: The Patmos Approach
Current processors are optimized for average case performance, often leading to a high worst-case execution time (WCET). Many architectural features that increase the average case...
Martin Schoeberl, Pascal Schleuniger, Wolfgang Puf...

Publication
163views
13 years 11 months ago
Saliency Maps of High Dynamic Range Images
A number of computational models of visual attention have been proposed based on the concept of saliency map. Some of them have been validated as predictors of the visual scan-path...
Roland Brémond, Josselin Petit and Jean-Philippe...