Abstract-- We propose a formal definition for the timed asynchronous distributed system model. We present extensive measurements of actual message and process scheduling delays and...
This paper examines architectural techniques for providing concurrent error detection in self-timed VLSI pipelines. Signal pairs from Differential Cascode Voltage Switch Logic are...
Wepresentan approachto designingreal-time systems based on dynamically sequencing condition-specific task-execution schedules. Asystem that dynamically alters its real-time execut...
This paper (1) gives complete details of an algorithm to compute approximate kth roots; (2) uses this in an algorithm that, given an integer n > 1, either writes n as a perfect ...