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VTS
2000
IEEE
113views Hardware» more  VTS 2000»
14 years 3 months ago
Hidden Markov and Independence Models with Patterns for Sequential BIST
We propose a novel BIST technique for non-scan sequential circuits which does not modify the circuit under test. It uses a learning algorithm to build a hardware test sequence gen...
Laurent Bréhélin, Olivier Gascuel, G...
VTS
2000
IEEE
108views Hardware» more  VTS 2000»
14 years 3 months ago
High-Level Observability for Effective High-Level ATPG
This paper focuses on observability, one of the open issues in High-Level test generation. Three different approximate metrics for taking observability into account during RT-leve...
Fulvio Corno, Matteo Sonza Reorda, Giovanni Squill...
VTS
2000
IEEE
103views Hardware» more  VTS 2000»
14 years 3 months ago
Invariance-Based On-Line Test for RTL Controller-Datapath Circuits
We present a low-cost on-line test methodology for RTL controller-datapath pairs, based on the notion of path invariance. The fundamental observation supporting the proposed metho...
Yiorgos Makris, Ismet Bayraktaroglu, Alex Orailogl...
VTS
2000
IEEE
108views Hardware» more  VTS 2000»
14 years 3 months ago
Cold Delay Defect Screening
Delay defects can escape detection during the normal production test flow, particularly if they do not affect any of the long paths included in the test flow. Some defect types ca...
Chao-Wen Tseng, Edward J. McCluskey, Xiaoping Shao...
VTS
2000
IEEE
137views Hardware» more  VTS 2000»
14 years 3 months ago
Extraction of Peak-to-Peak and RMS Sinusoidal Jitter Using an Analytic Signal Method
This paper proposes a new method based on analytic signal theory for extracting both instantaneous and RMS sinusoidal jitter from PLL output signals. The method relies on the exte...
Takahiro J. Yamaguchi, Masahiro Ishida, Mani Soma,...