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VTS
2002
IEEE
14 years 10 days ago
2002
IEEE
VTS
2002
IEEE
14 years 10 days ago
2002
IEEE
VTS
2002
IEEE
14 years 10 days ago
2002
IEEE
VTS
2002
IEEE
14 years 10 days ago
2002
IEEE
We present a test methodology to allow testing high-speed circuits with low-speed ATEs. The basic strategy is adding an interface circuit to partially supply test data, coordinate...
VTS
2002
IEEE
14 years 10 days ago
2002
IEEE
In this paper, we present a test pattern generation algorithm aiming at signal integrity faults on long interconnects. This is achieved by considering the effect of inputs and par...