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VTS
2007
IEEE
103views Hardware» more  VTS 2007»
14 years 2 months ago
At-Speed Testing of Core-Based System-on-Chip Using an Embedded Micro-Tester
In SoC designs, limited test access to internal cores, lowcost external tester’s lack of accuracy and slow frequencies make application of at-speed tests impractical. Therefore,...
Matthieu Tuna, Mounir Benabdenbi, Alain Greiner
VTS
2007
IEEE
135views Hardware» more  VTS 2007»
14 years 2 months ago
High Level Synthesis of Degradable ASICs Using Virtual Binding
—As the complexity of the integrated circuits increases, they become more susceptible to manufacturing faults, decreasing the total process yield. Thus, it would be desirable to ...
Nima Honarmand, A. Shahabi, Hasan Sohofi, Maghsoud...
VTS
2007
IEEE
116views Hardware» more  VTS 2007»
14 years 2 months ago
Case Study: Soft Error Rate Analysis in Storage Systems
Soft errors due to cosmic particles are a growing reliability threat for VLSI systems. In this paper we analyze the soft error vulnerability of FPGAs used in storage systems. Sinc...
Brian Mullins, Hossein Asadi, Mehdi Baradaran Taho...
ICCAD
2007
IEEE
92views Hardware» more  ICCAD 2007»
14 years 5 months ago
Fault-tolerant multi-level logic decoder for nanoscale crossbar memory arrays
Several technologies with sub-lithographic features are targeting the fabrication of crossbar memories in which the nanowire decoder is playing a major role. In this paper, we sug...
M. Haykel Ben Jamaa, Kirsten E. Moselund, David At...
AVSS
2007
IEEE
14 years 2 months ago
Face localization by neural networks trained with Zernike moments and Eigenfaces feature vectors. A comparison
Face localization using neural network is presented in this communication. Neural network was trained with two different kinds of feature parameters vectors; Zernike moments and E...
Mohammed Saaidia, Anis Chaari, Sylvie Lelandais, V...