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    ISCA
    2006
    IEEE
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    Interconnect-Aware Coherence Protocols for Chip Multiprocessors
    14 years 5 months ago
    Interconnect-Aware Coherence Protocols for Chip Multiprocessors
    Download  www.cis.upenn.edu
    Improvements in semiconductor technology have made it possible to include multiple processor cores on a single die. Chip Multi-Processors (CMP) are an attractive choice for future...
    Liqun Cheng, Naveen Muralimanohar, Karthik Ramani,...
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