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ASIACRYPT
2001
Springer
13 years 11 months ago
A Compact Rijndael Hardware Architecture with S-Box Optimization
Compact and high-speed hardware architectures and logic optimization methods for the AES algorithm Rijndael are described. Encryption and decryption data paths are combined and all...
Akashi Satoh, Sumio Morioka, Kohji Takano, Seiji M...