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    ICCD
    2005
    IEEE
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    Architectural Considerations for Energy Efficiency
    14 years 8 months ago
    Architectural Considerations for Energy Efficiency
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    The formal analysis of parallelism and pipelining is performed on an 8-bit Add-Compare-Select element of a Viterbi decoder. The results are quantified through a study of the delay...
    Hoang Q. Dao, Bart R. Zeydel, Vojin G. Oklobdzija
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