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IPPS
2002
IEEE
14 years 23 days ago
High-Performance Parallel and Distributed Computing for the BMI Eigenvalue Problem
The BMI Eigenvalue Problem is one of optimization problems and is to minimize the greatest eigenvalue of a bilinear matrix function. This paper proposes a parallel algorithm to co...
Kento Aida, Yoshiaki Futakata, Shinji Hara
IPPS
2002
IEEE
14 years 23 days ago
Hierarchical Interconnects for On-Chip Clustering
In the sub-micron technology era, wire delays are becoming much more important than gate delays, making it particularly attractive to go for clustered designs. A common form of cl...
Aneesh Aggarwal, Manoj Franklin
IPPS
2002
IEEE
14 years 23 days ago
Model-Based Control of Adaptive Applications: An Overview
Model-based control utilizes performance models of applications to choose performant system configurations for execution of applications. The performance models used in this resea...
Vikram S. Adve, Afolami Akinsanmi, James C. Browne...
IPPS
2002
IEEE
14 years 23 days ago
Mixed Formal Specifications with PVS
Michel Allemand, Jean-Claude Royer
IPPS
2002
IEEE
14 years 23 days ago
Utilization-Based Heuristics for Statically Mapping Real-Time Applications onto the HiPer-D Heterogeneous Computing System
Real-time applications continue to increase in importance as they are employed in various critical areas, such as command and control systems. These applications have traditionall...
Shoukat Ali, Jong-Kook Kim, Yang Yu, Shriram B. Gu...
IPPS
2002
IEEE
14 years 23 days ago
A Framework for Using Benefit Functions In Complex Real Time Systems
Researchers are currently investigating applying benefit, or utility functions for allocating resources in limited, soft real time systems [1,2,3]. While the future of real -time ...
David L. Andrews, Lonnie R. Welch, David M. Chelbe...
IEEEPACT
2002
IEEE
14 years 24 days ago
A Framework for Parallelizing Load/Stores on Embedded Processors
Many modern embedded processors (esp. DSPs) support partitioned memory banks (also called X-Y memory or dual bank memory) along with parallel load/store instructions to achieve co...
Xiaotong Zhuang, Santosh Pande, John S. Greenland ...
IEEEPACT
2002
IEEE
14 years 24 days ago
Using the Compiler to Improve Cache Replacement Decisions
Memory performance is increasingly determining microprocessor performance and technology trends are exacerbating this problem. Most architectures use set-associative caches with L...
Zhenlin Wang, Kathryn S. McKinley, Arnold L. Rosen...
IEEEPACT
2002
IEEE
14 years 24 days ago
Quantifying Instruction Criticality
Information about instruction criticality can be used to control the application of micro-architectural resources efficiently. To this end, several groups have proposed methods t...
Eric Tune, Dean M. Tullsen, Brad Calder