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HPCS
2002
IEEE
14 years 25 days ago
An Evaluation of Thread Migration for Exploiting Distributed Array Locality
Thread migration is one approach to remote memory accesses on distributed memory parallel computers. In thread migration, threads of control migrate between processors to access d...
Stephen Jenks, Jean-Luc Gaudiot
HPCS
2002
IEEE
14 years 25 days ago
MetaGrid: A Scalable Framework for Wide-Area Service Deployment and Management
This paper presents a novel architecture called the MetaGrid based on Grid computing concepts for resource provisioning for wide-area network-enabled applications. Resource provis...
Muthucumaru Maheswaran, Balasubramaneyam Maniymara...
HPCS
2002
IEEE
14 years 25 days ago
PRO: A Model for Parallel Resource-Optimal Computation
Assefaw Hadish Gebremedhin, Isabelle Guérin...
HPCS
2002
IEEE
14 years 25 days ago
CoStore: A Reliable and Highly Available Storage System Using Clusters
The CoStore cluster architecture has been proposed to construct a reliable and highly available storage system. A prototype CoStore has been implemented and its performance has be...
Yong Chen, Lionel M. Ni, Cheng-Zhong Xu, Mingyao Y...
HOTI
2002
IEEE
14 years 25 days ago
Distributed-and-Split Data-Control Extension to SCSI for Scalable Storage Area Networks
A “Storage-Area Network” (SAN) comprises computers (“Initiators”), storage “block devices” (“Targets”), and a Controller(s). Most SANs use the SCSI protocol over v...
Yitzhak Birk, Nafea Bishara
HOTI
2002
IEEE
14 years 25 days ago
A Flow Table-Based Design to Approximate Fairness
Rong Pan, Lee Breslau, Balaji Prabhakar, Scott She...
HOTI
2002
IEEE
14 years 25 days ago
Stable Round-Robin Scheduling Algorithms for High-Performance Input Queued Switches
High-performance input-queued switches require highspeed scheduling algorithms while maintaining good performance. Various round-robin scheduling algorithms for Virtual Output Que...
Jing Liu, Chun Kit Hung, Mounir Hamdi, Chi-Ying Ts...
HOTI
2002
IEEE
14 years 25 days ago
DiffServ over Network Processors: Implementation and Evaluation
Ying-Dar Lin, Yi-Neng Lin, Shun-Chin Yang, Yu-Shen...
HOTI
2002
IEEE
14 years 25 days ago
Architecture and Hardware for Scheduling Gigabit Packet Streams
We present an architecture and hardware for scheduling gigabit packet streams in server clusters that combines a Network Processor datapath and an FPGA for use in server NICs and ...
Raj Krishnamurthy, Sudhakar Yalamanchili, Karsten ...