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FORMATS
2007
Springer
14 years 3 months ago
CSL Model Checking Algorithms for Infinite-State Structured Markov Chains
Jackson queueing networks (JQNs) are a very general class of queueing networks that find their application in a variety of settings. The state space of the continuous-time Markov c...
Anne Remke, Boudewijn R. Haverkort
FORMATS
2007
Springer
14 years 3 months ago
Combining Formal Verification with Observed System Execution Behavior to Tune System Parameters
Resource limited DRE (Distributed Real-time Embedded) systems can benefit greatly from dynamic adaptation of system parameters. We propose a novel approach that employs iterative t...
Minyoung Kim, Mark-Oliver Stehr, Carolyn L. Talcot...
FORMATS
2007
Springer
14 years 3 months ago
Automatic Abstraction Refinement for Timed Automata
Henning Dierks, Sebastian Kupferschmid, Kim Guldst...
FMICS
2007
Springer
14 years 3 months ago
Model Classifications and Automated Verification
Due to the significant progress in automated verification, there are often several techniques for a particular verification problem. In many circumstances different techniques are ...
Radek Pelánek
FMCO
2007
Springer
124views Formal Methods» more  FMCO 2007»
14 years 3 months ago
Certification Using the Mobius Base Logic
This paper describes a core component of Mobius' Trusted Code Base, the Mobius base logic. This program logic facilitates the transmission of certificates that are generated u...
Lennart Beringer, Martin Hofmann, Mariela Pavlova
FMCO
2007
Springer
196views Formal Methods» more  FMCO 2007»
14 years 3 months ago
Coordinating Object Oriented Components Using Data-Flow Networks
We propose a framework for component-based modeling of distributed systems. It provides separation of concerns between computation (in object oriented components), coordination (vi...
Mohammad Mahdi Jaghoori
FMCAD
2007
Springer
14 years 3 months ago
Combining Symbolic Simulation and Interval Arithmetic for the Verification of AMS Designs
Abstract--Analog and mixed signal (AMS) designs are important integrated circuits that are usually needed at the interface between the electronic system and the real world. Recentl...
Mohamed H. Zaki, Ghiath Al Sammane, Sofiène...
FMCAD
2007
Springer
14 years 3 months ago
Improved Design Debugging Using Maximum Satisfiability
In today's SoC design cycles, debugging is one of the most time consuming manual tasks. CAD solutions strive to reduce the inefficiency of debugging by identifying error sourc...
Sean Safarpour, Hratch Mangassarian, Andreas G. Ve...
FMCAD
2007
Springer
14 years 3 months ago
A Mechanized Refinement Framework for Analysis of Custom Memories
We present a framework for formal verification of embedded custom memories. Memory verification is complicated ifficulty in abstracting design parameters induced by the inherently ...
Sandip Ray, Jayanta Bhadra
FMCAD
2007
Springer
14 years 3 months ago
Circuit Level Verification of a High-Speed Toggle
As VLSI fabrication technology progresses to 65nm feature sizes and smaller, transistors no longer operate as ideal switches. This motivates verifying digital circuits using contin...
Chao Yan, Mark R. Greenstreet