Abstract. Pattern-based verification trying to abstract away the concrete number of repeated memory structures is one of the approaches that have recently been proposed for verific...
In this paper we introduce an extension of Equilibrium Logic (a logical characterisation of the Answer Set Semantics for logic programs) consisting in the inclusion of modal tempor...
Most non-trivial applications use some form of input/output (I/O), such as network communication. When model checking such an application, a simple state space exploration scheme i...
Abstract Model Checking is a well-known and fully automatic technique for checking software properties, usually given as temporal logic formulas on the program variables. Most of m...
Abstract. This paper presents an efficient technique for real time estimation of on-board stereo vision system pose. The whole process is performed in the Euclidean space and consi...
Angel Domingo Sappa, Fadi Dornaika, David Ger&oacu...
abstract Parsing schemata [4] provide a formal, simple and uniform way to describe, analyze and compare different parsing algorithms. The notion of a parsing schema comes from cons...
—Using EXOR gates in logic synthesis often results in smaller circuit realizations. While in AND/OR synthesis the problem definition is clear, in AND/EXOR synthesis several clas...