In the system-on-chip (SoC) era, the growing number of functionalities included on a single chip requires the development of new design methodologies to keep the design complexity...
In this paper we present two algorithms that effectively synthesize a finite place/transition Petri net (p/t-net) from a finite set of labeled partial orders (a finite partial lang...
Synthesis of asynchronous circuits from Signal Transition Graphs (STGs) involves resolution of state encoding conflicts by means of refining the STG specification. In this paper, ...
A number of algorithms are available for computing the simulation relation on Kripke structures and on labelled transition systems representing concurrent systems. Among them, the...
Silvia Crafa, Francesco Ranzato, Francesco Tapparo
Abstract. The use of Feature Models (FMs) to define the valid combinations of features in Software Product Lines (SPL) is becoming commonplace. To enhance the scalability of FMs, ...
Mathieu Acher, Philippe Collet, Philippe Lahire, R...
─ Error tolerance formally captures the notion that – for a wide variety of applications including audio, video, graphics, and wireless communications – a defective chip that...
Multiprocessors require an interconnection network to connect processors with memory modules. The performance of the interconnection network can have a large effect upon overall s...
Recently we presented several disk array architectures designed to increase the data rate and I/O rate of supercomputing applications, transaction processing, and file systems [Pat...
Peter M. Chen, Garth A. Gibson, Randy H. Katz, Dav...