Abstract. How can we exploit a microprocessor as efficiently as possible? The “classic” approach is static optimization at compile-time, optimizing a program for all possible u...
Kevin Streit, Clemens Hammacher, Andreas Zeller, S...
Abstract. Data-parallel languages like OpenCL and CUDA are an important means to exploit the computational power of today’s computing devices. In this paper, we deal with two asp...
Much compiler-orientated work in the area of mapping parallel programs to parallel architectures has ignored the issue of external workload. Given that the majority of platforms w...
Dynamic typing is a barrier for JavaScript applications to achieve high performance. Compared with statically typed languages, the major overhead of dynamic typing comes from runt...
For each computer system generation, there are always applications or workloads for which the main memory size is the major limitation. On the other hand, in many cases, one could...
In chip multiprocessors (CMPs), data accesslatency dependson the memory hierarchy organization, the on-chip interconnect (NoC), and the running workload. Reducing data access late...
Cost pressure is driving vendors of safety-critical systems to integrate previously distributed systems. One natural approach we have previous introduced is On-Demand Redundancy (...
Brett H. Meyer, Benton H. Calhoun, John Lach, Kevi...
This paper advocates a rigorously formal and compositional style for obtaining key performance and/or interface metrics of systems with real-time constraints. We propose a hierarc...
Alena Simalatsar, Yusi Ramadian, Kai Lampka, Simon...
Escalating variations in modern CMOS designs have become a threat to Moore’s law. While previous works have proposed techniques for tolerating variations by trading reliability ...
nguage does not provide any abstractions for exception handling or other forms of error handling, leaving programmers to devise their own conventions for detecting and handling er...